Deemed to be University under Ministry of Education, Govt. of India

Shri (Dr.) Antaryami Panigrahi

Assistant Professor • Department of Electronics & Communication Engineering

Shri (Dr.) Antaryami Panigrahi
Scholarly Indexes & Profiles
Assistant Professor Electronics & Communication Engineering

Shri (Dr.) Antaryami Panigrahi

Institutional Email a.panigrahi@cit.ac.in
Academic Campus CIT Kokrajhar, BTR, Assam
Specialization & Research Thrusts

CMOS Analog and RF Circuits

 

 

Academic Background

Educational Qualifications & Pedagogy

B. Tech (ECE), M.Tech (Microelectronics & VLSI Design), PhD (Analog IC Design)
Extramural Grants

Sponsored R&D & Consultancy Projects (1)

# Project Title Funding Agency Principal Investigator Duration Tenure
1 Chip to StartUp Ministry of Electronics and Information Technology (MeitY), under Government of India Shri Antaryami Panigrahi 36 mos November/2024 – November/2027

Achievements & Awards

  • Received the Fellowship for 7th Edition Of IEEE International Test Conference - India (ITC Test Week India - 23 to 25 July, 2023)
  • Best Paper Award at 21st International Symposium in VLSI Design and Test (VDAT) in July 2017 held at IIT-Roorkee.

Workshops Organised

  • 2 Day Workshop (Hybrid mode) on "Analog & Mixed Signal Circuit Design" from 30-31st Jan-2026 at CIT campus.
  • Online talk on "The path of UnderGrad to a skilled Engineer: Opportunities & Challenges" 11th June 2022 
  • Two Day Virtual Workshop/ Webinar on "Intelligent Electronics, Embedded Systems, Communication Technologies” 20-21st November, 2020 
  • Two Day Workshop on"VLSI & Embedded Systems” at CIT-Kokrajhar, February, 21-22, 2020 

Courses Taught

  1. Linear ICs and Systems (8 terms)
  2. VLSI Design (6 terms)
  3. Control Theory (1 term)
  4. Microprocessor (3 terms)
  5. Microcontrollers (3 terms)
  6. Embedded Systems (3 terms)
  7. Electronic Devices and Circuits (6 terms)
  8. Semiconductor Physics (1 term)

Student Related Activities

  • Final yr (Batch of 2024) project group participated in "Odisha Semiconductor Design challenge" at STPI Bhubaneswar Mar 2024.
  • Final yr (Batch of 2023) project group participated in "RISC-V Processor Design challenge" at DVCON-23 Bengaluru May 2023.

Research Profiles

  1. Google Scholar: https://scholar.google.co.in/citations?user=-ROdulAAAAAJ&hl=en
  2. Web of Science ResearcherID: HHM-3651-2022
  3. Scopus ID: 37079505600
  4. ORCiD: https://orcid.org/0000-0002-2718-9822 
  1. Vidwan-ID : 173022

Book Chapters

  • Published a Chapter "Design of an Impedance Attenuated Control Loop for Flipped Voltage Follower-Based Output-Capacitor-Less LDO Regulators" CRC Press, Pages16, eBook ISBN9781003483052, Feb 2025 [https://doi.org/10.1201/9781003483052]